View P87CL883T_1944213.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

d a t a sh eet product speci?cation supersedes data of 1997 aug 18 file under integrated circuits, ic17 1999 mar 15 integrated circuits p8xcl883; p8xcl884 telx microcontrollers for ct0 handset/basestation applications
2 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 contents 1 features 2 general description 3 ordering information 4 block diagram 5 pinning information 5.1 pinning 5.2 pin description 6 functional description 6.1 special function registers (sfrs) 6.2 i/o facilities 6.2.1 ports 6.2.2 port i/o configuration 6.2.3 alternative port function register (altp) 6.3 timer/event counters 6.3.1 timer t2 6.3.2 timer/counter 2 control register (t2con) 6.4 msk modem 6.5 watchdog timer 6.6 otp programming 6.6.1 otp programming by a programmer 6.6.2 in-system programming mode 6.7 oscillator circuitry 6.7.1 resonator requirements 6.7.2 recommended resonator types 6.8 emulation 6.9 non-conformance 6.9.1 programming interface/ transparent mode 6.9.2 low voltage detection 6.9.3 edge detection on uart 7 limiting values 8 characteristics 9 package outline 10 soldering 10.1 introduction to soldering surface mount packages 10.2 reflow soldering 10.3 wave soldering 10.4 manual soldering 10.5 suitability of surface mount ic packages for wave and reflow soldering methods 11 definitions 12 life support applications 13 purchase of philips i 2 c components
3 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 1 features full static 80c51 cpu; enhanced 8-bit architecture with: C minimum 6 cycles per instruction (twice as fast as a standard 80c51 core) C non-page oriented instructions C direct addressing C four 8-byte ram register banks C stack depth limited only by available internal ram (maximum 256 bytes) C multiply, divide, subtract and compare instructions. 8-bit ports: C p8xcl883: 3 (19 i/o lines) C p8xcl884: 3 (18 i/o lines). program memory: C p8xcl883/p8xcl884: 8-kbyte one time programmable (otp). 256-byte ram 128-byte eeprom data memory, accessed internally via i 2 c-bus interface (p8xcl884 only) amplitude controlled oscillator (aco) suitable for quartz crystal or ceramic resonator improved power-on/power-off reset (por) circuitry low voltage detection (lvd) with 11 software programmable levels eight interrupts on port 1: C edge or level sensitive triggering selectable via software C power-saving use for keyboard control. twenty source, twenty vector interrupt structure with two priority levels wake-up from power-down mode via lvd or external interrupts at port 1 dtmf generator (p8xcl884 only) msk modem including manchester encoder/decoder with 2 digital outputs for analog cordless telephones (standards ct0/ct1/ct1+) two standard 16-bit timer/event counters additional 16-bit timer/event counter with capture, compare and auto-reload function watchdog timer full duplex enhanced uart with double buffering i 2 c-bus interface for serial transfer on two lines, maximum 400 khz very low current consumption single supply voltage: 2.7 to 3.6 v frequency: 3.58 mhz operating temperature: - 25 to +70 c 28 pin so package. 2 general description the p8xcl883/p8xcl884 are manufactured in an advanced cmos technology. the p8xcl883 is based on single-chip technology and the p8xcl884 is based on mcm (multi-chip-module) technology as the eeprom is integrated on a separate chip. the p8xcl883/p8xcl884 are 8-bit microcontrollers especially suited for low cost analog cordless telephone applications (ct0, ct1, ct1+ standards). for this purpose, features like dtmf, eeprom, msk modem and por/lvd are integrated on-chip. the device is optimized for low power consumption. the p8xcl883/p8xcl884 have two software selectable features for power reduction: idle and power-down modes. in addition, all derivative blocks can switch off their clock if they are inactive. the instruction set of the p8xcl883/p8xcl884 is based on that of the 80c51. the p8xcl883/p8xcl884 also function as an arithmetic processor having facilities for both binary and bcd arithmetic plus bit-handling capabilities. the instruction set consists of over 100 instructions: 49 one-byte, 46 two-byte, and 16 three-byte. due to the missing port p2, there is no external data or memory access and the movx operations cannot be used. this data sheet details the specific properties of the p8xcl883/p8xcl884; for details of the p8xcl883/p8xcl884 core and the derivative functions see the telx family data sheet and data handbook ic20; 80c51-based 8-bit microcontrollers .
4 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 3 ordering information type number otp type package name description version P87CL883T/000 blank otp so28 plastic small outline package; 28 leads; body width 7.5 mm sot136-1 p87cl884t/000 P87CL883T/xxx factory-programmed otp p87cl884t/xxx p83cl883t/xxx pre-programmed otp p83cl884t/xxx
5 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... 4 block diagram handbook, full pagewidth mbk981 xtal1 xtal2 aco two 16-bit timer/ event counters (t0, t1) clk (2) mout2 mout1 mout0 (3) parallel i/o ports p0 p1 p3 (7) txd (4) t2comp (2) sda (2) scl (2) rxd (4) t2 (2) rst porenable t2ex (2) cpu 8 serial uart port data memory ram dtmf p87cl883 p87cl884 tone (1) rx_mute (6) tx_mute (6) min v dd v pp v ss msk modem 8-bit internal bus program memory otp/rom (5) 16-bit timer/event counter with capture/ compare (t2) eeprom (1) i 2 c-bus interface watchdog timer (t3) por lvd t0 (4) int2 to int9 (2) fig.1 block diagram. (1) only available on the p8xcl884. (2) alternative functions of port 1. (3) mout0 is the alternative function of p3.1. (4) alternative functions of port 3; t0 is only available on the p8xcl883. (5) in-circuit otp programming. (6) by software, any i/o pin can be used. (7) port 3: p3.0, p3.1 and p3.4; p3.4 is only available on the p8xcl883.
6 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 5 pinning information 5.1 pinning fig.2 pin configuration. handbook, halfpage mbk005 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 p0.5 porenable/v pp p0.6 p0.7 p3.0/rxd/data p3.1/txd/clock/mout0 rst min mout1 mout2 xtal1 xtal2 p1.0/int2/t2 p1.1/int3/t2ex v dd p0.4 p0.3 p0.2 p0.1 p0.0 p1.7/int9/sda p1.6/int8/scl p1.5/int7 p1.4/int6/clk p1.3/int5 p1.2/int4/t2comp v ss p3.4/t0 or tone (1) p83cl883 p83cl884 p87cl883 p87cl884 (1) pin 20 : p3.4/t0 on the p8xcl883; tone on the p8xcl884.
7 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 5.2 pin description symbol pin description rst 6 active low reset. a low level on this pin for two machine cycles while the oscillator is running, resets the device. the rst pin is also an output which can be used to reset other ics. min 7 digital msk modem input. mout1 8 digital msk modem outputs. mout2 9 xtal1 10 crystal input. input to the amplitude controlled oscillator. also the input for an externally generated clock source. xtal2 11 crystal output. output of the amplitude controlled oscillator. to be left unconnected when an external oscillator clock is used. v dd 14 power supply. v ss 15 ground. p0.0 to p0.7 23 to 27, 1to3 port 0. 8-bit bidirectional i/o port. every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to section 6.2. p1.0/int2/t2 12 port 1 . 8-bit bidirectional i/o port with alternative functions. every port pin except p1.6 and p1.7 (i 2 c-bus pins) can be used as open-drain, standard port, high-impedance input or push-pull output, according to section 6.2. port p1.3 has led drive capability. port 1 also serves the alternative functions: int2 to int9 interrupts; timer t2 external inputs t2 and t2ex ; timer t2 compare output t2comp ; external clock output clk ; i 2 c-bus clock scl and data in/outputs sda . p1.1/int3/t2ex 13 p1.2/int4/t2comp 16 p1.3/int5 17 p1.4/int6/clk 18 p1.5/int7 19 p1.6/int8/scl 21 p1.7/int9/sda 22 p3.0/rxd/data 4 port 3. 3 or 2-bit bidirectional i/o port with alternative functions. every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to chapter 6.2. port 3 also serves the alternative functions: rxd/data is the serial port receiver data input (asynchronous) or data i/o (synchronous); txd/clock is the serial port transmitter data output (asynchronous) or clock output (synchronous) or digital msk modem output mout0 ; t0 is an external input for timer 0. p3.4/t0 is only available on the p8xcl883. p3.1/txd/clock/ mout0 5 p3.4/t0 20 tone 20 dtmf output; tone is only available on the p8xcl884. porenable/v pp 28 porenable . power-on reset circuit enable. if porenable = 1, the internal power-on reset circuit is enabled. if external reset circuitry is used, it is recommended to keep porenable = 0 to reach lowest power consumption. this pin is also used for the otp programming voltage v pp .
8 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6 functional description 6.1 special function registers (sfrs) table 1 list of sfrs register address (hex) reset value (1) 80c51 core acc e0 0000 0000 b f0 0000 0000 dpl 82 0000 0000 dph 83 0000 0000 pch no sfr 0000 0000 pcl no sfr 0000 0000 pcon 87 0000 0000 presc f3 0000 0000 psw d0 0000 0000 sp 81 0000 0111 t0/t1 tcon 88 0000 0000 th0 8c 0000 0000 th1 8d 0000 0000 tl0 8a 0000 0000 tl1 8b 0000 0000 tmod 89 0000 0000 port altp a3 0000 0000 p0 80 1111 1111 p0cfga 8e 1111 1111 p0cfgb 8f 0000 0000 p1 90 1111 1111 p1cfga 9e 0011 1111 p1cfgb 9f 0000 0000 p3 b0 xxx 1 xx 11 p3cfga be xxx 1 xx 11 p3cfgb bf xxx 0 xx 00 p4 c1 xxxx xxx 0 timer2 comp2h ab 0000 0000 comp2l aa 0000 0000 rcap2h cb 0000 0000 rcap2l ca 0000 0000 t2con c8 0000 0000 th2 cd 0000 0000 tl2 cc 0000 0000 eeprom interface eecon fb 0000 0000 dtmf hgf a2 0000 0000 lgf a1 0000 0000 interrupt logic ien0 a8 0000 0000 ien1 e8 0000 0000 ien2 f1 0000 0000 ip0 b8 0000 0000 ip1 f8 0000 0000 ip2 f9 0000 0000 ise1 e1 0000 0000 ix1 e9 0000 0000 irq1 c0 0000 0000 lvd lvdcon f2 0000 0000 por/aco rstat e6 xxx 0 1000 msk mcon d3 0000 0000 mbuf d1 xxxx xxxx mstat d2 xx 00 0000 uart s0buf 99 0000 0000 s0con 98 0000 0000 i 2 c-bus interface s1adr db 0000 0000 s1con d8 0000 0000 s1dat da 0000 0000 s1sta d9 1111 1000 register address (hex) reset value (1)
9 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 note 1. where: x = undefined state or not implemented bit. 6.2 i/o facilities 6.2.1 p orts the p8xcl883/p8xcl884 have 19 and 18 i/o lines respectively, treated as 19 and 18 individually addressable bits or as three parallel 8-bit addressable ports. the alternative functions are detailed below: port 0 offers no alternative functions. port 1 used for a number of special functions: p1.0 to p1.7 provides the inputs for the external interrupts int2 to int9 p1.2/t2comp for external activation and compare/auto-reload output function of timer 2 p1.4/clk for the clock output p1.6/scl and p1.7/sda for the i 2 c-bus interface are real open-drain outputs or high-impedance; no other port configurations are available. port 2 not available. port 3 pins can be configured individually to provide: p3.0/rxd/data and p3.1/txd/clock/mout0 which are serial port receiver input and transmitter output (uart) p3.4/t0 as counter input; available only in p8xcl883. to enable a port pin alternative function, the port bit latch in its sfr must contain a logic 1. wdt wdcon a5 1010 0101 wdtim ff 0000 0000 otp interface oah d5 x 00 x xxxx oal d4 xxxx xxxx odata d6 xxxx xxxx oisys dc 000 x 0000 otest d7 0000 0000 reserved locations; do not write reserved e7, fd - register address (hex) reset value (1) each port consists of a latch (special function registers p0 to p3), an output driver and input buffer. all ports have internal pull-ups. figure 3b shows that the strong transistor p1 is turned on for only one oscillator period after a low-to-high transition in the port latch. when on, it turns on p3 (a weak pull-up) through the inverter in1. this inverter and transistor p3 form a latch which holds the logic 1. port p1.3 has led drive capability. 6.2.2 p ort i/o configuration i/o port output configurations are determined by the settings in port configuration sfrs. there are 2 sfrs for each port: pncfga and pncfgb, where n indicates the specific port number (0 to 3). one bit in each of the 2 sfrs relates to the output setting for the corresponding port pin, allowing any combination of the 2 output types to be mixed on those port pins. for example, the output type of p1.3, is controlled by the setting of bit 3 in the sfrs p1cfga and p1cfgb. the port pins may be individually configured via sfrs with one of the following modes (p1.6 and p1.7 can be open-drain or high-impedance but never have any diodes against v dd ). these modes are also shown in fig.3. mode 0 open-drain; quasi-bidirectional i/o with n-channel open-drain output. use as an output requires the connection of an external pull-up resistor; e.g. port 0 for external memory accesses (ea = 0) or access above the built-in memory boundary. the esd protection diodes against v dd and v ss are still present; see fig.3b. except for the i 2 c-bus pins p1.6 and p1.7, ports which are configured as open-drain still have a protection diode to v dd . mode 1 standard port; quasi-bidirectional i/o with pull-up. the strong pull-up p1 is turned on for only two oscillator periods after a low-to-high transition in the port latch. after these two oscillator periods the port is only weakly driven through p2 and very weakly driven through p3 (see fig.3b). mode 2 high-impedance; this mode turns off all output drivers on a port. thus, the pin will not source or sink current and may be used as an input-only pin with no internal drivers for an external device to overcome (see fig.3c). mode 3 push-pull; output with drive capability in both polarities. under this mode, pins can only be used as outputs (see fig.3d).
10 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 tables 2 and 3 show the configuration register settings for the 4 port output types. the electrical characteristics of each output type can be found in chapter 8. the default port configuration after reset is given in table 3. table 2 port con?guration registers pncfga and pncfgb (n = 0 to 3) settings note 1. mode changes may cause glitches to occur during transitions. when modifying both registers, write instructions should be carried out consecutively. table 3 special function registers for port con?gurations/data notes 1. this means that p0, p1.0 to p1.5 and p3 are initialized in mode 1 (quasi-bidirectional, driving a weak high) and the i 2 c-bus ports p1.6 and p1.7 are initialized in mode 0 (open-drain, not driven). 2. port pin p3.4 is only available on p8xcl883. mode (1) pncfga pncfgb port output mode normal ports i 2 c-bus ports (p1.6 and p1.7) mode 0 0 0 open-drain open-drain mode 1 1 0 quasi-bidirectional open-drain mode 2 0 1 high-impedance high-impedance mode 3 1 1 push-pull open-drain register name register mnemonic sfr address (hex) state after reset port p0 output data (1) p0 80 1111 1111 port p0 con?guration a p0cfga 8e 1111 1111 port p0 con?guration b p0cfgb 8f 0000 0000 port p1 output data (1) p1 90 1111 1111 port p1 con?guration a p1cfga 9e 0011 1111 port p1 con?guration b p1cfgb 9f 0000 0000 port p3 output data (1) p3 b0 xxx 1 xx 11 (2) port p3 con?guration a p3cfga be xxx 1 xx 11 (2) port p3 con?guration b p3cfgb bf xxx 0 xx 00 (2)
11 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.2.3 a lternative p ort f unction r egister (altp) this 4-bit register selects the alternative function of certain port pins. table 4 alternative port function register (sfr address a3h) table 5 description of altp bits 76543210 ---- emout0 eclk emldy etone bit symbol description 7to4 - these 4 bits are reserved. 3 emout0 if this bit is set, p3.1 will output the mout0 signal. 2 eclk if this bit is set, p1.4 is con?gured to be push-pull, and p1.4 will output the system clock. 1 emldy if this bit is set, p1.5 is con?gured to be push-pull, and p1.5 will output the digital mldy signal of the dtmf generator. 0 etone if this bit is set, the tone output of the dtmf generator is enabled.
12 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 fig.3 port configuration options. handbook, full pagewidth mbk004 this diode is not implemented on the i 2 c-bus pins v ss v dd external n q from port latch external pull-up i/o pin input data v dd v ss handbook, full pagewidth mbk001 p1 p2 p3 input data 1 oscillator period n v ss v dd strong pull-up i/o pin q from port latch in1 v ss handbook, full pagewidth mbk002 this diode is not implemented on the i 2 c-bus pins input data v dd i/o pin v ss handbook, full pagewidth mbk003 p n strong pull-up q from port latch v ss v dd v dd i/o pin input data v ss a. open-drain. b. standard/quasi-bidirectional. c. high-impedance. d. push-pull.
13 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.3 timer/event counters the p8xcl883/p8xcl884 contain three 16-bit timer/event counters: timer 0, timer 1 and timer 2 which can perform the following functions: measure time intervals and pulse durations count events generate interrupt requests generate output on comparator match. in the timer mode the register is incremented every machine cycle. since a machine cycle consists of minimum 6 oscillator periods, the maximum count rate is 1 6 f osc . in the counter mode, the register is incremented in response to a high-to-low transition. since it takes one machine cycle (minimum 6 oscillator periods) to recognize a high-to-low transition, the maximum count rate is 1 6 f osc . to ensure a given level is sampled, it should be held for at least one complete machine cycle. timer 0 and timer 1 can be programmed independently to operate in four modes: mode 0 8-bit timer or 8-bit counter each with divide-by-32 prescaler. mode 1 16-bit time-interval or event counter. mode 2 8-bit time-interval or event counter with automatic reload upon overflow. mode 3 timer 0 establishes tl0 and th0 as two separate counters. note that the t0 input is only available on p8xcl883. 6.3.1 t imer t2 note that the timer t2 of the p8xcl883/p8xcl884 deviates from the timer t2 described in the telx family data sheet. timer t2 is a 16-bit timer/counter that can operate either as a timer or as an event counter. these functions are selected by the state of the c/ t2 bit in the t2con register. five operating modes are available: capture compare auto-reload compare with auto-reload capture and compare. these modes are selected via the t2con register. 6.3.1.1 capture mode in the capture mode, two options may be selected by the exen2 bit in t2con: if exen2 = 0, then timer 2 is a 16-bit timer or counter which upon overflowing sets the timer 2 overflow bit tf2, this may then be used to generate an interrupt. if exen2 = 1, timer 2 operates as described above but with the additional feature that a high-to-low transition at external input t2ex causes the current value in tl2 and th2 to be captured into registers rcap2l and rcap2h respectively. in addition, the transition at t2ex causes the exf2 bit in t2con to be set; this may also be used to generate an interrupt. the capture mode is shown in fig.4. 6.3.1.2 compare mode in the compare mode, each time timer t2 is incremented, the contents of the compare registers comp2h and comp2l is compared with the new counter value of timer t2. when a match occurs, the interrupt flag comp in register t2con and port bit p1.2 are toggled. the 16-bit value held in these registers is preset by software. the first toggle after a chip reset will set the flag comp. the compare mode is shown in fig.4. 6.3.1.3 auto-reload mode in the auto-reload mode there are also two options selected by the exen2 bit in t2con: if exen2 = 0, then when timer 2 rolls over, it sets the tf2 bit but also causes the timer 2 registers to be reloaded with the 16-bit value held in registers rcap2l and rcap2h. the 16-bit value held in these registers is preset by software. if exen2 = 1, timer 2 operates as described above but with the additional feature that a high-to-low transition at external input t2ex will also trigger the 16-bit reload and set the exf2 bit. 6.3.1.4 compare with auto-reload mode the auto-reload mode can also be used together with the compare mode. the auto-reload modes are shown in fig.5. 6.3.1.5 capture and compare modes the capture and the compare mode of timer t2 can be used separately or simultaneously. the function is chosen via the bits ecomp, cp/ rl2 and tr2 in register t2con.
14 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 fig.4 timer 2 in capture and/or compare mode. handbook, full pagewidth mbh998 tl2 (8 bits) comparator 1 (16 bits) tr2 control th2 (8 bits) comp2l comp2h ecomp rcap2l rcap2h exf2 tf2 comp timer 2 interrupt port p1.2 exen2 control c/t2 = 1 t2 pin 6 osc transition detector t2ex pin c/t2 = 0 capture fig.5 timer 2 in auto-reload with/without compare mode. handbook, full pagewidth mbh999 tl2 (8 bits) comparator 1 (16 bits) tr2 control th2 (8 bits) comp2l comp2h ecomp rcap2l rcap2h exf2 tf2 comp timer 2 interrupt port p1.2 exen2 control c/t2 = 1 t2 pin 6 osc transition detector t2ex pin c/t2 = 0 reload
15 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.3.2 t imer /c ounter 2c ontrol r egister (t2con) table 6 timer/counter 2 control register (sfr address c8h) table 7 description of t2con bits table 8 timer 2 operating modes 76543210 tf2 exf2 comp ecomp exen2 tr2 c/ t2 cp/ rl2 bit symbol description 7 tf2 timer 2 over?ow ?ag. tf2 is set by a timer 2 over?ow and must be cleared by software. 6 exf2 timer 2 external ?ag. exf2 is set when either a capture or reload is caused by a negative transition on t2ex and when exen2 = 1. when timer t2 interrupt is enabled, exf2 = 1 will cause the cpu to vector to timer 2 interrupt routine. exf2 must be cleared by software. 5 comp interrupt ?ag . when a match between the 16-bit compare register (comp2l and comp2h) and the new counter value of timer t2 occurs, the interrupt ?ag comp in register t2con and port bit p1.2 are toggled. 4 ecomp enable compare output bit. when set by software, the controller toggles port bit p1.2 (t2comp) when a compare match occurs. 3 exen2 timer 2 external enable ?ag. when set, allows a capture or reload to occur as a result of a negative transition on t2ex. exen2 = 0 causes timer 2 to ignore events at t2ex. 2 tr2 timer 2 start/stop control. control bit for timer 2. 1c/ t2 timer 2 timer or counter select. c/ t2 = 0 selects the internal timer with a clock frequency of 1 6 f osc . c/ t2 = 1 selects the external event counter; negative edge-triggered. 0 cp/ rl2 capture/reload ?ag. when set captures will occur on negative transitions at t2ex, if exen2 = 1. when cleared, auto-reloads will occur either with timer 2 over?ows or negative transitions at t2ex when exen2 = 1. ecomp cp/ rl2 tr2 mode 0 0 1 16-bit auto-reload 0 1 1 16-bit capture 1 0 1 16-bit compare 1 1 1 16-bit capture and compare 1 0 0 16-bit compare with auto-reload 000off
16 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.4 msk modem for the p8xcl883/p8xcl884, min is no longer the alternative function of p4.0, but min is a separate pin. the polarity of min can however still be programmed with the p4.0 bit. p4.0 is a data sfr but no port logic is connected. only the most significant bits of mout, i.e. mout2 and mout1 are directly available as separate pins. in order to be able to further increase the signal quality, the mout0 signal is available as an alternative port function of p3.1. for controlling this alternative port function the emout0 bit has been added to the alternative port function register (altp); see section 6.2.3. 6.5 watchdog timer the watchdog timer differs from the description in the telx family data sheet in that the external ew pin does not exist on the p8xcl883/p8xcl884. fig.6 functional diagram of the watchdog timer (t3). handbook, full pagewidth mbh997 prescaler 13-bit counter register 8-bit wdtim 8-bit reload register internal reset rst pin f osc 8192 f osc wdcon register enable overflow internal bus
17 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.6 otp programming 6.6.1 otp programming by a programmer the 8 kbytes one time programmable (otp) memory can be programmed by using a programmer (om4260) together with a programmer adapter om5508. since the memory is programmable only once, programming an already programmed address results in a logical and of the old and new code. the otp code can be read out by the programmer for verification. 6.6.1.1 signature bytes the otp memory contains three signature bytes which can be read by the programmer to identify the device. a special address space has been used for these bytes which does not influence the user address space. the values of the signature bytes are: (030h) = 15h, indicates manufactured by philips semiconductors (031h) = c5h, indicates p8xcl883/p8xcl884 (060h) = 00h, currently not used. 6.6.2 i n -s ystem p rogramming mode in the in-system programming mode the otp can be programmed under control of the cpu. a program to control programming has to be available in the otp. this mode can be used to program several bytes in the otp if the chip is already in a system e.g. to store tuning parameters. in the in-system programming mode the complete address space otp can be programmed. the user should take care not to overwrite the existing code. for in-system programming four sfrs are used to control the otp. table 9 sfrs for in-system programming sfr name description oah otp address high register oal otp address low register odata otp data register oisys otp in-system register 6.6.2.1 otp in-system programming register (oisys) the oisys sfr controls the in-system programming mode. the data that has to be programmed is stored in the sfr odata and the address for this data is held in the sfrs oah and oal. table 10 otp in-system programming register (sfr address dch) table 11 description of oisys bits 76543210 --- vpon sec sig we insysmode bit symbol description 7to5 - these bits are reserved. 4 vpon v pp status (read only). 3 - this bit is reserved. 2 sig signature bytes enable. 1 we write enable, enables programming. 0 insysmode in-system programming status bit.
18 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.6.2.2 mode entry the in-system programming mode is entered by setting the insysmode bit of the oisys sfr. the i 2 c-bus is used for data transfer in this mode. if the i 2 c-bus interface is addressed by an external master, the interface generates an interrupt request. the interrupt handler can now read the oisys sfr and determine the status of the external high voltage (vpon). if high voltage is not present the interrupt is a standard i 2 c-bus interrupt. if high voltage is present the in-system program interrupt routine has to start that writes the insysmode bit (oisys.0) and controls the address and data transfer. this paragraph is valid for version 2 (2 ending on type number). during in-system programming the otp memory must be in the dc read mode. this is achieved by writing 08h to the otest sfr. if the in-system programming mode is left, 00h must be written into the otest srf. the program voltage must be available and stable for at least 10 m s before the mode is entered and has to be stable until the circuit has left the in-system programming mode. the high voltage can be applied for maximum 60 seconds during the complete lifetime of the circuit. 6.6.2.3 program cycle the data and address must be supplied to the microcontroller and the control program must write to the sfrs: odata, oah and oal. a timer has to be initialized for a 100 m s cycle and the we bit of the oisys sfr must be set. now the core has to be set into idle mode. as long as the circuit is in idle mode a programming pulse is applied. after the interrupt request of the timer the otp is available for normal code fetching. the address applied to the oah and oal sfrs must be in the 8 kbytes address space. 6.6.2.4 verify for in-system programming verify is done in similar way as programming. the circuit is put into idle mode and at the start of this mode the sense amplifiers are switched to verify mode and a read cycle is started. the timer must be initialized for a cycle of at least 1 m s. the address is supplied by the sfrs oah and oal. the we bit of the oisys sfr has to be reset. the otp output data is latched in the odata sfr. after idle mode is finished this sfr can be read in a normal way. to ensure that the verified data is written into the sfr it is advised to write ffh into the odata sfr before a verify is started. 6.6.2.5 signature bytes the signature bytes can be read by setting the sig bit of the oisys sfr and applying the address of the signature byte. applying a write pulse while the sig bit of the oisys sfr is high is forbidden although the contents of the signature bytes will never be destroyed. 6.6.2.6 how to connect the porenable/v pp pin in the in-system programming mode if the v pp pin is dual-mode (e.g. porenable/v pp ), ics connected to the signal porenable must be able to withstand up to 13 v , i.e. cannot have clamping diodes or low break-down voltages. if the pin is connected to a fixed voltage (v dd or v ss ) there must be a way of switching-off this connection on the pcb. one possible implementation is presented in fig.7 where por is enabled in normal mode of operation (pin porenable/v pp = 1 by the pull-up), the v pp source must supply enough current in r p in order to guarantee a minimum 12.5 v on the porenable/v pp pin. note that if in the application the power-on reset is disabled (pin porenable/v pp = 0), applying a high voltage to the porenable/v pp pin will also enable the por circuit. this will cause a reset independent of the actual v dd value. 6.7 oscillator circuitry general information on the oscillator circuitry can be found in the telx family data sheet. 6.7.1 r esonator requirements for correct function of the oscillator, the values of r 1 and c 0 of the chosen resonator (quartz or pxe) must be below the line shown in fig.8a. the value of the parallel resistor r 0 must be less than 47 k w . the wiring between chip and resonator should be kept as short as possible. 6.7.2 r ecommended resonator types csa 3.58mg (supplier murata) fcr3.58m5 (supplier tdk).
19 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 fig.7 porenable/v pp connection on a pcb. handbook, halfpage mbk006 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 p83cl883 p83cl884 p87cl883 p87cl884 v dd r p v pp pad on pcb a. resonator curves. b. resonator equivalent circuit. handbook, halfpage 0 (1) (2) c o (pf) 20 40 80 500 0 r1 ( w ) 400 60 300 200 100 mda088 (3) c 1e and c 2e are the external load capacitances; normally not needed due to integrated load capacitances of typically 10 pf. (1) c 1e =c 2e =22pf. (2) c 1e =c 2e = 0 pf. (3) c 1e =c 2e =12pf. fig.8 resonator requirements for the aco. handbook, halfpage c 1 c 0 l 1 r 1 r 0 mgl137
20 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 6.8 emulation the emulator for the p8xcl883/p8xcl884 uses the p87cl880 microcontroller in emulation mode. the p87cl880 is a super-set of the p8xcl883/p8xcl884, i.e. it contains all the functions of the p8xcl883/p8xcl884 plus a number of other additional functions. it should be noted that some functional differences between p87cl880 and p8xcl883/p8xcl884 exist; see table 12. table 12 differences between functions existing in p87cl880 and p8xcl883/p8xcl884 function p87cl880 p8xcl883/p8xcl884 timer 2 see p87cl880 speci?cation see p8xcl883/p8xcl884 speci?cation otp program memory 32 kbytes afprom 8 kbytes eprom or pre-programmed rom ram 512 bytes 256 bytes ew pin (watchdog enable) yes no security concept see p87cl880 speci?cation see p8xcl883/p8xcl884 speci?cation in-system programming no yes reset value of sfrs see p87cl880 speci?cation see p8xcl883/p8xcl884 speci?cation por hardware programmable ?xed frequency dc to 12.5 mhz 3.58 mhz package qfp64 so28 6.9 non-conformance 6.9.1 p rogramming interface /t ransparent mode the transparent mode is a special operating mode of the microcontroller used for parallel and in-system otp programming. for certain combinations of data written to port 1 (used for control signal during parallel programming mode) the transparent mode may be incorrectly active during normal operation of the microcontroller. in this case, a transition on any of port 0 pins can influence the read out of the on-chip program memory, resulting in incorrect code execution. to avoid this problem, the insysmode bit in the otp in-system programming register (sfr address dch) must be set in the start-up sequence of the program code. apart from preventing incorrect operation as described above, the setting of this bit does not affect the normal operation. 6.9.2 l ow v oltage d etection the lvdi bit (lvdcon.6) may incorrectly be set due to a glitch on the lvd output, when the lvd is enabled, by changing the bits lvdcon(3:0) from 0000 to any value within the range 0001 to 0101. if bit ea in register ien0 is enabled, an unwanted interrupt may occur. a software workaround for this problem exists. during the initialisation sequence: enable lvd by writing to register lvdcon enable lvd interrupt by writing to register ien2 clear the lvdi bit by writing to lvdcon a second time set bit ea in register ien0 (ensures lvdi to be cleared after initialisation). 6.9.3 e dge detection on uart in receive mode 1, 2 and 3 it is possible that an internal setup/hold condition of a flip-flop is violated. this results in a not detected start bit (start condition) during receive mode. the probability of occurrence (verified on sampling basis) is below 3%. there is no workaround for this problem other than to use the uart only in mode 0 for reception.
21 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 7 limiting values in accordance with the absolute maximum rating system (iec 134). 8 characteristics v dd = 2.7 to 3.6 v; v ss =0v; f xtal = 3.58 mhz; t amb = - 25 to +70 c; t amb (during in-system programming) = +20 to +40 c; all voltages with respect to v ss unless otherwise speci?ed. symbol parameter min. max. unit v dd supply voltage - 0.5 +4.0 v v i input voltage on any pin with respect to ground (v ss ) - 0.5 v dd + 0.5 v p tot total power dissipation - 800 mw t stg storage temperature - 65 +150 c symbol parameter conditions min. typ. max. unit supply v dd supply voltage operating 2.7 - 3.6 v ram data retention in power-down mode 1.0 - 3.6 v in-system programming 3.0 - 3.6 v v pp otp programming voltage 12.5 - 13.0 v i dd operating supply current v dd = 3 v; note 1 -- 3.0 ma v dd =3v; t amb =25 c; note 1; see fig.10 - 1.8 - ma i dd(id) supply current idle mode v dd = 3 v; note 2 -- 0.55 ma v dd =3v; t amb =25 c; note 2; see fig.11 - 0.38 - ma i dd(pd) supply current power-down mode v dd =3v; t amb =25 c; note 3; see fig.12 por and lvd enabled - 25 m a por and lvd disabled - 100 - na i dd(block) supply current per block: v dd =3v; t amb =25 c; notes 4 and 5 eeprom erase/write - 460 -m a dtmf no load on tone output - 240 -m a msk modem - 140 -m a watchdog - 110 -m a i 2 c-bus - 90 -m a uart - 90 -m a timer t2 - 90 -m a timer t0 or t1 - 5 -m a
22 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 inputs (ports, min, rst, mout0 to mout2, porenable) v il low-level input voltage notes 6 and 7 0 - 0.2v dd v v ih high-level input voltage note 6 0.8v dd - v dd v ? i il ? low-level input current (ports in mode 1) v in = 0.4 v; note 8; see fig.9 - 10 50 m a ? i il(t) ? low-level input current; high-to-low transition (ports in mode 1) v in = 0.5v dd ; note 8; see fig.9 - 200 1000 m a ? i li ? input leakage current (ports in mode 0 or 2) v ss v i v dd -- 1 m a port outputs (ports, rst, mout0 to mout2) i ol low-level output current; except p1.3, sda, scl and mout2 v ol = 0.4 v 2 -- ma i ol1 low-level output current; p1.3 (for led) v ol = 0.4 v 6 -- ma i ol2 low-level output current; sda, scl and mout2 v ol = 0.4 v; note 9 3 -- ma i oh high-level output current except p1.3; push-pull options only v oh =v dd - 0.4 v 2 -- ma i oh1 high-level output current p1.3 (for led); push-pull options only v oh =v dd - 0.4 v 6 -- ma i oh2 high-level output current mout2 v oh =v dd - 0.4 v 3 -- ma i rst rst pull-up transistor current v dd =3v; v oh =v dd - 0.4 v 0.05 0.2 -m a v dd =3v; v oh =v ss - 0.6 2.5 m a power-on reset (por); for the lvd (low voltage detection) see note 10 v porh power-on reset trip level high option 5 in telx family speci?cation 2.13 2.37 2.61 v v porl power-on reset trip level low option a in telx family speci?cation 1.98 2.27 2.56 v tone output (note 11 and fig.13) v hg(rms) hgf voltage (rms) v dd = 3 v 158 181 205 mv v lg(rms) lgf voltage (rms) 125 142 160 mv d f/f frequency deviation - 0.6 - +0.6 % v dc dc voltage level - 0.5v dd - v v g pre-emphasis of group 1.5 2.0 2.5 db thd total harmonic distortion v dd =3v; t amb =25 c; notes 5 and 12 - 25 - db eeprom (notes 5 and 13) t e/w erase/write time 8 10 12 ms n e/w erase/write cycles 10 5 -- t dr data retention time t amb = +70 c10 -- years symbol parameter conditions min. typ. max. unit
23 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 notes 1. the operating supply current is measured with all output pins disconnected; v il =v ss ; v ih =v dd ; rst = v dd ; xtal1 driven with square wave; xtal2 not connected; fetch of nop instructions; all derivative blocks disabled. 2. the idle mode supply current is measured with all output pins and rst disconnected; v il =v ss ; v ih =v dd ; xtal1 driven with square wave; xtal2 not connected; all derivative blocks disabled. 3. the power-down current is measured with all output pins and rst disconnected; v il =v ss ; v ih =v dd ; xtal1 and xtal2 not connected;. 4. the typical currents are only for the specific block. to calculate the typical power consumption of the microcontroller, the current consumption of the cpu must be added. example: the typical current consumption of the microcontroller in operating mode with cpu, watchdog and uart active can be calculated as (1.8 + 0.11 + 0.09) ma = 2.0 ma. 5. verified on sampling basis. 6. the input threshold voltage of p1.6/scl and p1.7/sda meet the i 2 c-bus specification. therefore, an input voltage below 0.3v dd will be recognized as a logic 0 and an input voltage above 0.7v dd will be recognized as a logic 1. 7. for pin porenable the v il(max) = 0.1v dd . 8. not valid for pins sda, scl, rst, min and porenable. 9. the maximum allowed load capacitance c l is in this case limited to around 200 pf. 10. the lvd is tested according to the specification in the data sheet telx family; chapter: low voltage detection . 11. values are specified for dtmf frequencies only (cept cs203). 12. related to the low group frequency (lgf) component (cept cs203). 13. after final testing the value of each eeprom bit is typically logic 1. 14. can also be done by two 100 m s pulses. 15. c 1i and c 2i are the total internal capacitances (including gate capacitance, leadframe capacitance). in-system programming for the otp t prog program cycle time 90 100 110 m s t ver verify cycle time 1 --m s t vpp(setup) program voltage setup time 10 --m s t vpp(max) maximum program voltage time cumulative for the product lifetime -- 60 s i vpp program voltage current in-system programming -- 40 ma aco (amplitude controlled oscillator) v xtal1 external clock signal amplitude peak-to-peak 500 - v dd mv z i(xtal1) input impedance on xtal1 300 1000 - k w c 1i ; c 2i input capacitance on xtal1 and xtal2 notes 5 and 15 - 10 - pf symbol parameter conditions min. typ. max. unit
24 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 fig.9 input current. handbook, full pagewidth mgl506 0.5v dd 0.3v dd v dd 0 i il(t) i il i i 500 m a 10 m a fig.10 typical operating current as a function of v dd , t amb =25 c. handbook, halfpage 2.2 2.6 4.2 v dd (v) 2.2 2.5 1.6 i dd (ma) 1.3 1.9 3 3.4 3.8 mgl628 fig.11 typical idle current as a function of v dd , t amb =25 c. handbook, halfpage 2.2 2.6 4.2 v dd (v) 0.5 0.6 0.3 i dd(id) (ma) 0.2 0.4 3 3.4 3.8 mgl627
25 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 fig.12 typical power-down current as a function of v dd . handbook, halfpage 0 (1) (2) (3) (4) 12 4 4 3 i dd(pd) ( m a) 1 0 2 3 v dd (v) mda085 (1) por and lvd enabled (t amb =70 c). (2) por and lvd enabled (t amb =25 c). (3) por and lvd disabled (t amb =70 c). (4) por and lvd disabled (t amb =25 c). fig.13 tone output test circuit. handbook, halfpage mgb835 10 k w tone 50 pf 1 m f device type number (1) v dd v ss (1) p8xcl883/p8xcl884.
26 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 9 package outline unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 18.1 17.7 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot136-1 x 14 28 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a e 15 1 (a ) 3 a y 0.25 075e06 ms-013ae pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.71 0.69 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale so28: plastic small outline package; 28 leads; body width 7.5 mm sot136-1 95-01-24 97-05-22
27 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 10 soldering 10.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. 10.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. 10.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 10.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
28 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 10.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
29 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 11 definitions 12 life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. 13 purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
30 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 notes
31 philips semiconductors product speci?cation telx microcontrollers for ct0 handset/basestation applications p8xcl883; p8xcl884 notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1999 sca62 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 489 4339/4239, fax. +30 1 481 4240 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 printed in the netherlands 465008/00/02/pp32 date of release: 1999 mar 15 document order number: 9397 750 05027

▲Up To Search▲

Price & Availability of P87CL883T

	To Download P87CL883T Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .